1. Field of the Invention
The present invention relates to a method for heat treatment and particularly to a method for heat treatment of a silicon wafer capable of reducing crystal originated particles in the near surface region.
2. Background of the Related Art
As semiconductor integrated circuit devices (semiconductor devices) become more highly integrated, the corresponding design rule is reduced so as to make the process of fabricating a semiconductor device more difficult. Thus, improvement of wafer quality is required to increase the yield realized from the fabrication process of semiconductor devices as well as the reliability of the semiconductor devices produced.
Accordingly, a surface layer of the silicon wafer, on which devices are fabricated, must be free of defects. Crystal Originated Particles (COPs), which are introduced into the single silicon crystal during crystal growth, are present on the surface layer of the silicon wafer, degrading the electrical reliability of the silicon wafer. Therefore, many efforts have been made to develop a wafer free from COP defects.
In addition, a wafer having a gettering means for trapping transition metals, which induce fatal defects to devices in the process of fabricating semiconductor devices on the wafer, is required. Oxygen precipitates located in the active device region of the wafer can impair the operation of the device. Oxygen precipitates located in the bulk of the wafer, however, are capable of trapping undesired metal impurities. The use of oxygen precipitates located in the bulk of the wafer to trap metals is referred to as xe2x80x98gettering? In the process of fabricating a semiconductor device, gettering means for trapping transition metal are provided in a wafer so as to effectively control the flow of transition metal into a circuit device forming region.
xe2x80x98Getteringxe2x80x99 mainly includes intrinsic gettering (IG) and extrinsic gettering (EG).
IG is carried out in such a manner that bulk micro defect (BMD), acting as a gettering site, is provided in a semiconductor device fabrication process by controlling a quantity of interstitial oxygen (Oi) in the wafer manufacturing process. Yet, because the heat treatment temperature in a semiconductor device fabrication process has a tendency to decrease, such a low temperature process makes the formation of BMD as the gettering site more difficult.
Meanwhile, EG includes polysilicon back seal (PBS), back side damage (BSD), high energy implantation, and the like.
A method of manufacturing a silicon wafer to which such a concept of gettering is applied is disclosed in Korean Patent Laid-Open No. 2001-0003616.
Various methods of manufacturing wafers having oxygen precipitate defect layers of high density without grown-in defects in the surface region have been reported or studied. In order to remove grown-in defects in the surface region as well as prepare such oxygen precipitates of high density in the bulk of the wafer, many efforts have been made to study heat treatment thereof. These studies indicate significant differences in the corresponding results depending upon the ways or conditions of the heat treatment.
For instance, in using rapid thermal process (RTP), xe2x80x98slipxe2x80x99 due to RTP temperature occurs occasionally. Moreover, RTP is carried out in such a short time so that it is almost impossible to remove grown-in defects generated from the crystal growth. When an ideal wafer is manufactured using RTP, after having removed grown-in defects at a crystal growth step, RTP is carried out to reinforce the gettering effect so as to form BMD of high density inside the bulk of the wafer. Therefore, there is a limitation on carrying out heat treatment on a substrate as well as hardware.
As an alternative to RTP, there is a method using a diffusion furnace. Yet, such a diffusion furnace method shows different results in accordance with heat treatment conditions such as heat treatment temperature, ramp-up-rate temperature profile, ambient gas, and the like. Moreover, quality obtained using the diffusion furnace method depends greatly on temperature distribution in the furnace, thereby often resulting in irregular quality.
Accordingly, the present invention is directed to a silicon wafer and fabricating method therefor that substantially obviates one or more problems due to limitations and disadvantages of the related art.
An object of the present invention is to provide a silicon wafer and fabricating method therefor having no COP defect in an active region where a semiconductor device is to be formed, a denuded zone (DZ) at a uniform depth according to oxygen concentration, and a high-density oxygen precipitate defect layer.
To achieve these objects and other advantages and in accordance with the purpose of the invention, as embodied and broadly described herein, a method of fabricating a silicon wafer according to the present invention includes the steps of preparing a silicon wafer by slicing, grinding, and cleaning an ingot, inserting the silicon wafer in a diffusion furnace having an ambience of one of Ar, N2, and inert gas including Ar and N2, pre-heating and maintaining the diffusion furnace at about 500xc2x0 C., changing the ambience into H2, Ar or inert gas including H2 and Ar successively, increasing a temperature of the diffusion furnace by a temperature-increasing speed of 50xcx9c70xc2x0 C./min between 500xcx9c800xc2x0 C., 10xcx9c50xc2x0 C./min between 800xcx9c900xc2x0 C., 0.5xcx9c10xc2x0 C./min between 900xcx9c1000xc2x0 C., and 0.1xcx9c0.5xc2x0 C./min between 1000xcx9c1250xc2x0 C., maintaining the diffusion furnace at 1200xcx9c1250xc2x0 C. for 1xcx9c120 min, changing the ambience inside the diffusion furnace into Ar, N2, or inert gas ambience including Ar and N2 successively, and decreasing the temperature of the diffusion furnace down to 500xc2x0 C. by a temperature-decreasing speed of 0.1xcx9c0.5xc2x0 C./min between 1000xcx9c1250xc2x0 C., 0.5xcx9c10xc2x0 C./min between 900xcx9c1000xc2x0 C., 10xcx9c50xc2x0 C./min between 800xcx9c900xc2x0 C., and 50xcx9c70xc2x0 C./min between 500xcx9c800xc2x0 C.
Preferably, the method further includes a step of maintaining the temperature of the diffusion furnace at about 1200xc2x0 C. for about an hour after the step of maintaining the diffusion furnace at 1200xcx9c1250xc2x0 C. for 1xcx9c120 min.
In another aspect of the present invention, a silicon wafer having a silicon bulk surrounded edge and two flat surfaces which are almost parallel with each other, comprises a denuded zone having a depth of about 15 micro meters from one flat surface, wherein oxygen precipitates do not exist, and a gettering region under the denuded zone in the silicon bulk, wherein concentration of BMD nuclei is at least 5xc3x97105 ea/cm2 oxygen concentration inside the silicon bulk is preferably 2 to 5 times higher than that of the top surface of the denuded zone.